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5 changed files with 665 additions and 0 deletions
9
Cargo.toml
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9
Cargo.toml
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[package]
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name = "ltir"
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version = "0.1.0"
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edition = "2021"
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[dependencies]
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laddertypes = { path = "../lib-laddertypes" }
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tisc = { path = "../lib-tisc" }
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158
src/expr.rs
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158
src/expr.rs
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use {
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std::{
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boxed::Box,
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sync::{Arc, RwLock}
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}
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};
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#[derive(Debug)]
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pub enum Statement {
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Assignment {
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var_id: String,
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val_expr: LTExpr
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},
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WhileLoop {
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condition: Box<LTExpr>,
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body: Vec<Statement>
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},
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Return(LTExpr),
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Expr(LTExpr)
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}
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#[derive(Debug)]
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pub enum LTExpr {
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SymbolLiteral {
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typ: laddertypes::TypeTerm,
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symbol: String,
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},
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WordLiteral {
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typ: laddertypes::TypeTerm,
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val: tisc::VM_Word
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},
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CallLiteral {
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typ: laddertypes::TypeTerm,
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result_size: usize,
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val: tisc::VM_Word
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},
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Application {
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head: Box<LTExpr>,
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body: Vec<LTExpr>
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},
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Abstraction {
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arg_id: String,
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arg_type: laddertypes::TypeTerm,
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val_expr: Box<LTExpr>
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},
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Branch {
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condition: Box<LTExpr>,
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if_expr: Box<LTExpr>,
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else_expr: Box<LTExpr>
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},
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Block {
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statements: Vec<Statement>
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}
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}
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impl LTExpr {
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pub fn var_symbol(typectx: &Arc<RwLock<laddertypes::TypeDict>>, str: &str) -> Self {
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LTExpr::SymbolLiteral {
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typ: typectx.write().unwrap().parse("<Ref memory::Word>~Symbol~<Seq Char>").expect("parse typeterm"),
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symbol: String::from(str)
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}
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}
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pub fn call_symbol(
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typectx: &Arc<RwLock<laddertypes::TypeDict>>,
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//typ: laddertypes::TypeTerm,
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result_size: usize,
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addr: tisc::VM_Word
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) -> Self {
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LTExpr::CallLiteral {
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typ: typectx.write().unwrap().parse("machine::Word").expect("parse typeterm"),
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result_size,
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val: addr
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}
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}
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pub fn lit_uint(typectx: &Arc<RwLock<laddertypes::TypeDict>>, val: u64) -> Self {
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LTExpr::WordLiteral {
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typ: typectx.write().unwrap().parse("ℤ_2^64~machine::UInt64~machine::Word").expect("parse typeterm"),
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val: val as tisc::VM_Word
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}
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}
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pub fn abstraction(typectx: &Arc<RwLock<laddertypes::TypeDict>>, arg_id: &str, arg_typ: &str, val_expr: LTExpr) -> LTExpr {
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LTExpr::Abstraction {
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arg_id: String::from(arg_id),
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arg_type: typectx.write().unwrap().parse(arg_typ).expect("parse typeterm"),
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val_expr: Box::new(val_expr)
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}
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}
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pub fn application(head: LTExpr, body: Vec<LTExpr>) -> Self {
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LTExpr::Application {
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head: Box::new( head ),
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body: body
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}
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}
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pub fn block(body: Vec<Statement>) -> Self {
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LTExpr::Block {
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statements: body
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}
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}
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}
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impl Statement {
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pub fn while_loop(cond: LTExpr, body: Vec<Statement>) -> Self {
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Statement::WhileLoop {
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condition: Box::new(cond),
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body
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}
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}
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}
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/*
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impl LTExpr {
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fn get_type(&self, dict: &laddertypes::dict::TypeDict) -> laddertypes::TypeTerm {
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match self {
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LTExpr::StringLiteral{ val:_, typ } => { typ.clone() }
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LTExpr::MemoryLiteral{ val:_, typ } => { typ.clone() }
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LTExpr::Abstraction{ arg_type, val_expr } => {
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laddertypes::TypeTerm::App(vec![
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laddertypes::TypeTerm::TypeID(dict.get_typeid(&"Fn".into()).expect("expected function type")),
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arg_type.clone(),
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val_expr.get_type(dict)
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])
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}
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LTExpr::Application{ head, body } => {
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match head.deref() {
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LTExpr::Abstraction{ arg_type, val_expr } => {
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val_expr.get_type(dict)
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}
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_ => {
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panic!("invalid application");
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}
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}
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}
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LTExpr::Block{ statements } => {
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if let Some(last_statement) = statements.last() {
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match last_statement {
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Statement::Return(ret_expr) |
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Statement::Expr(ret_expr) => {
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ret_expr.get_type(dict)
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}
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_ => {
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laddertypes::TypeTerm::unit()
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}
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}
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} else {
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laddertypes::TypeTerm::unit()
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}
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}
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}
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}
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}
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*/
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296
src/main.rs
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296
src/main.rs
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@ -0,0 +1,296 @@
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use {
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std::{boxed::{Box}, ops::Deref},
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std::collections::HashMap,
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std::sync::{Arc, RwLock},
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};
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mod expr;
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mod symbols;
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mod procedure_compiler;
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use crate::{
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expr::{LTExpr, Statement},
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symbols::{SymbolTable},
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procedure_compiler::ProcedureCompiler
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};
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fn main() {
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let mut typectx = Arc::new( RwLock::new( laddertypes::dict::TypeDict::new() ));
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// define 'T' to be a type-variable in all type-terms
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typectx.write().unwrap().add_varname("T".into());
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// create virtual machine with 4096 words of memory
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let mut vm = tisc::VM::new(0x1000);
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// store function types & link addresses
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let mut symbols = SymbolTable::new();
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/* Duplicate the top item on the stack,
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* and whatever type this word has is preserved
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*/
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symbols.define(&mut vm, &typectx,
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"dup",
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// input type
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vec![ "T~machine::Word" ],
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// output type
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vec![ "T~machine::Word",
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"T~machine::Word" ],
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tisc::Assembler::new().instruction( tisc::VM_Instruction::Dup )
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);
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/* The top two items must be native u64 integers,
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* which are replaced by their sum.
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* We do not know wheter a sum of two integers actually
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* preserves the semantics of a more abstract type
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*/
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symbols.define(&mut vm, &typectx,
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"addi",
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// input type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word",
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"ℤ_2^64~machine::UInt64~machine::Word" ],
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// output type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word" ],
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tisc::Assembler::new().instruction( tisc::VM_Instruction::Add )
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);
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symbols.define(&mut vm, &typectx,
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"subi",
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// input type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word",
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"ℤ_2^64~machine::UInt64~machine::Word" ],
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// output type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word" ],
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tisc::Assembler::new()
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.instruction(tisc::VM_Instruction::BitwiseNot)
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.lit(1)
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.instruction(tisc::VM_Instruction::Add)
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.instruction(tisc::VM_Instruction::Add)
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);
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/* Put a single Ascii character on stdout
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*/
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symbols.define(&mut vm, &typectx,
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"emit",
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// input type
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vec![ "Char~Ascii~machine::Word" ],
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// output type
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vec![],
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tisc::Assembler::new().instruction( tisc::VM_Instruction::Emit )
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);
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/* Fetch memory address
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*/
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symbols.define(&mut vm, &typectx,
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"@",
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// input type
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vec![ "<MutRef T~machine::Word>~machine::Address~machine::Word" ],
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// output type
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vec![ "T~machine::Word" ],
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tisc::Assembler::new().instruction( tisc::VM_Instruction::Fetch )
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);
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/* Store to memory
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*/
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symbols.define(&mut vm, &typectx,
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"!",
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// input type
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vec![
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"<MutRef T~machine::Word>~machine::Address~machine::Word",
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"T~machine::Word"
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],
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// output type
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vec![],
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tisc::Assembler::new().instruction( tisc::VM_Instruction::Store )
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);
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/*
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* let double = λx.(addi x x);
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*/
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symbols.define(&mut vm, &typectx,
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"double",
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// input type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word" ],
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// output type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word" ],
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ProcedureCompiler::new()
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.compile(
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<Expr::abstraction(
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&typectx,
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"x",
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"ℤ_2^64~machine::UInt64~machine::Word",
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LTExpr::application(
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symbols.call_symbol(&typectx, "addi"),
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vec![
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LTExpr::var_symbol(&typectx, "x"),
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LTExpr::var_symbol(&typectx, "x")
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]
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)
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)
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)
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.into_asm()
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);
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/*
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* let muli = λa.λb.{
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* let mut sum = 0;
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* while( b != 0 ) {
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* sum := (addi sum a);
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* b := (subi b 1);
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* }
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* sum
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* };
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*/
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symbols.define(&mut vm, &typectx,
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"muli",
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// input type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word",
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"ℤ_2^64~machine::UInt64~machine::Word" ],
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// output type
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vec![ "ℤ_2^64~machine::UInt64~machine::Word" ],
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tisc::Assembler::new()
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.lit(0) // [ a b ] -- [ a b sum ]
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.while_loop(
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// condition
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tisc::Assembler::new()
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// [ a b sum ] -- [ a b sum b ]
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.lit( 2 )
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.instruction( tisc::VM_Instruction::Pick ),
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// body
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tisc::Assembler::new()
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// [ a b sum ] -- [ a b sum a ]
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.lit( 3 )
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.instruction( tisc::VM_Instruction::Pick )
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// [ a b sum a -- a b (sum+a) ]
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.instruction( tisc::VM_Instruction::Add )
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// [ a b sum -- a sum b ]
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.instruction( tisc::VM_Instruction::Swap )
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// [ a sum b -- a sum b 1 ]
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.lit( 1 )
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// [ a sum b -- a sum (b-1) ]
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.call( symbols.get_link_addr("subi").expect("subi not linked") )
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// [ a sum b -- a b sum ]
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.instruction( tisc::VM_Instruction::Swap )
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)
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// [ a b sum -- a sum b ]
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.lit(2).instruction(tisc::VM_Instruction::Roll)
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// [ a sum b -- a sum ]
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.instruction(tisc::VM_Instruction::Drop)
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// [ a sum -- sum a ]
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.lit(2).instruction(tisc::VM_Instruction::Roll)
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// [ sum a -- sum ]
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.instruction(tisc::VM_Instruction::Drop)
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);
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/*
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* glob1 : <Ptr machine::Word>~machine::Address~machine::Word = 0x80;
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*/
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symbols.define(&mut vm, &typectx,
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"glob1",
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vec![],
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vec![
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"<Ref machine::Word>~<Ptr machine::Word>~machine::Address~machine::Word"
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],
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tisc::Assembler::new().lit(0x80)
|
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);
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/*
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* let main = {
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* (! glob1 10);
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* while (@ glob1) {
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* (! glob1 (subi (@ glob1) 1));
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* (emit 42);
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* }
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* };
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*/
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symbols.define(&mut vm, &typectx,
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"main",
|
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vec![],
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vec![],
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ProcedureCompiler::new()
|
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.compile(
|
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<Expr::block(vec![
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Statement::Expr(LTExpr::application(
|
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symbols.call_symbol(&typectx, "!"),
|
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vec![
|
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symbols.call_symbol(&typectx, "glob1"),
|
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LTExpr::lit_uint(&typectx, 10)
|
||||
]
|
||||
)),
|
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Statement::while_loop(
|
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LTExpr::application(
|
||||
symbols.call_symbol(&typectx, "@"),
|
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vec![
|
||||
symbols.call_symbol(&typectx, "glob1")
|
||||
]
|
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),
|
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vec![
|
||||
Statement::Expr(LTExpr::application(
|
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symbols.call_symbol(&typectx, "!"),
|
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vec![
|
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symbols.call_symbol(&typectx, "glob1"),
|
||||
|
||||
LTExpr::application(
|
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symbols.call_symbol(&typectx, "subi"),
|
||||
vec![
|
||||
LTExpr::lit_uint(&typectx, 1),
|
||||
LTExpr::application(
|
||||
symbols.call_symbol(&typectx, "@"),
|
||||
vec![
|
||||
symbols.call_symbol(&typectx, "glob1")
|
||||
]
|
||||
),
|
||||
]
|
||||
),
|
||||
]
|
||||
)),
|
||||
|
||||
Statement::Expr(LTExpr::application(
|
||||
symbols.call_symbol(&typectx, "emit"),
|
||||
vec![ LTExpr::lit_uint(&typectx, 42) ]
|
||||
))
|
||||
]
|
||||
),
|
||||
])
|
||||
)
|
||||
.into_asm()
|
||||
);
|
||||
|
||||
vm.execute( symbols.get_link_addr("main").unwrap() );
|
||||
eprintln!("\nvm.stack = {:?}", vm.data_stack);
|
||||
}
|
||||
131
src/procedure_compiler.rs
Normal file
131
src/procedure_compiler.rs
Normal file
|
|
@ -0,0 +1,131 @@
|
|||
|
||||
use {
|
||||
crate::expr::{LTExpr, Statement}
|
||||
};
|
||||
|
||||
pub struct ProcedureCompiler {
|
||||
locals: Vec< String >,
|
||||
asm: tisc::Assembler,
|
||||
result_size: usize
|
||||
}
|
||||
|
||||
impl ProcedureCompiler {
|
||||
pub fn new() -> Self {
|
||||
ProcedureCompiler {
|
||||
locals: Vec::new(),
|
||||
asm: tisc::Assembler::new(),
|
||||
result_size: 0
|
||||
}
|
||||
}
|
||||
|
||||
pub fn into_asm(self) -> tisc::Assembler {
|
||||
self.asm
|
||||
}
|
||||
|
||||
pub fn verify(&self) {
|
||||
|
||||
}
|
||||
|
||||
pub fn compile_statement(mut self, statement: &Statement) -> Self {
|
||||
match statement {
|
||||
Statement::Assignment{ var_id, val_expr } => {
|
||||
|
||||
}
|
||||
Statement::WhileLoop { condition, body } => {
|
||||
let asm = self.asm;
|
||||
|
||||
self.asm = tisc::Assembler::new();
|
||||
self = self.compile( &condition );
|
||||
let cond_asm = self.asm;
|
||||
|
||||
self.asm = tisc::Assembler::new();
|
||||
for statement in body.iter() {
|
||||
self = self.compile_statement( statement );
|
||||
}
|
||||
let body_asm = self.asm;
|
||||
|
||||
self.asm = asm;
|
||||
self.asm = self.asm.while_loop(cond_asm, body_asm);
|
||||
}
|
||||
Statement::Expr( expr ) => {
|
||||
self = self.compile( expr );
|
||||
}
|
||||
Statement::Return( expr ) => {
|
||||
self = self.compile( expr );
|
||||
}
|
||||
}
|
||||
self
|
||||
}
|
||||
|
||||
pub fn compile(mut self, expr: <Expr) -> Self {
|
||||
match expr {
|
||||
LTExpr::SymbolLiteral { typ, symbol } => {
|
||||
// todo: check type
|
||||
|
||||
// search locals
|
||||
let mut id = None;
|
||||
|
||||
for (i, l) in self.locals.iter().enumerate() {
|
||||
if l == symbol {
|
||||
id = Some(self.locals.len()-i);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if let Some(id) = id {
|
||||
self.asm = self.asm
|
||||
.lit(id as i64)
|
||||
.instruction(tisc::VM_Instruction::Pick);
|
||||
} else {
|
||||
eprintln!("unknown symbol '{}'", symbol);
|
||||
}
|
||||
},
|
||||
LTExpr::WordLiteral { typ, val } => {
|
||||
self.asm = self.asm.lit( *val );
|
||||
}
|
||||
LTExpr::CallLiteral { typ, result_size, val } => {
|
||||
self.result_size += result_size;
|
||||
self.asm = self.asm.call( *val );
|
||||
}
|
||||
LTExpr::Application { head, body } => {
|
||||
for arg in body.iter().rev() {
|
||||
self = self.compile(arg);
|
||||
}
|
||||
self = self.compile(&head);
|
||||
},
|
||||
LTExpr::Abstraction { arg_id, arg_type, val_expr } => {
|
||||
self.locals.push(arg_id.clone());
|
||||
self = self.compile(val_expr);
|
||||
|
||||
// drop locals
|
||||
self.asm = self.asm
|
||||
.lit( self.result_size as tisc::VM_Word + 1 )
|
||||
.instruction(tisc::VM_Instruction::Roll)
|
||||
.instruction(tisc::VM_Instruction::Drop);
|
||||
|
||||
self.locals.pop();
|
||||
},
|
||||
LTExpr::Branch { condition, if_expr, else_expr } => {
|
||||
self = self.compile(&condition);
|
||||
|
||||
let asm = self.asm;
|
||||
self.asm = tisc::Assembler::new();
|
||||
self = self.compile( &if_expr );
|
||||
let if_asm = self.asm;
|
||||
self.asm = tisc::Assembler::new();
|
||||
self = self.compile( &else_expr );
|
||||
let else_asm = self.asm;
|
||||
self.asm = asm;
|
||||
self.asm = self.asm.branch( if_asm, else_asm );
|
||||
}
|
||||
LTExpr::Block { statements } => {
|
||||
for s in statements.iter() {
|
||||
self = self.compile_statement(s);
|
||||
}
|
||||
}
|
||||
}
|
||||
self
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
71
src/symbols.rs
Normal file
71
src/symbols.rs
Normal file
|
|
@ -0,0 +1,71 @@
|
|||
use std::{
|
||||
collections::HashMap,
|
||||
sync::{Arc, RwLock},
|
||||
};
|
||||
|
||||
use {
|
||||
crate::expr::LTExpr
|
||||
};
|
||||
|
||||
pub struct SymbolEntry {
|
||||
link_addr: tisc::VM_Word,
|
||||
|
||||
in_types: Vec< laddertypes::TypeTerm >,
|
||||
out_types: Vec< laddertypes::TypeTerm >
|
||||
}
|
||||
|
||||
pub struct SymbolTable {
|
||||
symbols: HashMap< String, SymbolEntry >,
|
||||
linker: tisc::Linker
|
||||
}
|
||||
|
||||
impl SymbolTable {
|
||||
pub fn new() -> Self {
|
||||
SymbolTable {
|
||||
symbols: HashMap::new(),
|
||||
linker: tisc::Linker::new(0x100)
|
||||
}
|
||||
}
|
||||
|
||||
pub fn get_link_addr(&self, symbol: &str) -> Option< tisc::VM_Word > {
|
||||
self.symbols.get(&String::from(symbol)).map(|e| e.link_addr)
|
||||
}
|
||||
|
||||
pub fn call_symbol(&self, typectx: &Arc<RwLock<laddertypes::TypeDict>>, symbol: &str) -> LTExpr {
|
||||
let entry = self.symbols.get(&String::from(symbol)).unwrap();
|
||||
LTExpr::call_symbol(
|
||||
/*
|
||||
&laddertypes::TypeTerm::App(vec![
|
||||
typectx.write().unwrap().parse("Fn").expect("parse typeterm"),
|
||||
laddertypes::TypeTerm::App( entry.in_types.clone() ),
|
||||
laddertypes::TypeTerm::App( entry.out_types.clone() )
|
||||
]),
|
||||
*/
|
||||
typectx,
|
||||
entry.out_types.len(),
|
||||
entry.link_addr
|
||||
)
|
||||
}
|
||||
|
||||
pub fn define(
|
||||
&mut self,
|
||||
vm: &mut tisc::VM,
|
||||
typectx: &Arc<RwLock<laddertypes::TypeDict>>,
|
||||
symbol: &str,
|
||||
in_types: Vec<&str>,
|
||||
out_types: Vec<&str>,
|
||||
asm: tisc::Assembler
|
||||
) {
|
||||
self.linker.link( vm, String::from(symbol), asm.build() );
|
||||
|
||||
self.symbols.insert(
|
||||
String::from(symbol),
|
||||
SymbolEntry {
|
||||
link_addr: self.linker.resolve_symbol(&String::from(symbol)).expect("cant find symbol"),
|
||||
in_types: in_types.into_iter().map(|t| typectx.write().unwrap().parse(t).expect("parse typeterm")).collect(),
|
||||
out_types: out_types.into_iter().map(|t| typectx.write().unwrap().parse(t).expect("parse typeterm")).collect()
|
||||
}
|
||||
);
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in a new issue