load example program from file
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parent
9ad58620d6
commit
f8a967abbf
3 changed files with 208 additions and 95 deletions
src
106
src/main.rs
106
src/main.rs
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@ -20,13 +20,13 @@ use crate::{
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fn compile(
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scope: &Arc<RwLock<Scope>>,
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name: &str,
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source: &str,
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source: impl Iterator<Item = char>,
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) -> Vec<tisc::assembler::AssemblyWord> {
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ProcedureCompiler::new(scope)
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.compile(
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&parser::parse_expr(
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&scope.read().unwrap().typectx,
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&mut lexer::LTIRLexer::from(source.chars().peekable())
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&mut lexer::LTIRLexer::from(source.peekable())
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.filter(|tok| match tok {
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(_, Ok(lexer::LTIRToken::Comment(_))) => false,
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_ => true
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@ -40,10 +40,10 @@ fn compile(
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/* TODO:
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* - write to address resulting from expression
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* - `::` -> '.' and allow ↦ only
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* - Parser error reporting
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* - Compiler error reporting
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* - write to address resulting from expression
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* - sized objects
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* - Typecheck for LTExpr::Application
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* - typecheck & inference for rest
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*/
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@ -57,100 +57,16 @@ fn main() {
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let main_scope = Scope::with_parent(&root_scope);
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let typectx = main_scope.read().unwrap().typectx.clone();
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let args: Vec<String> = std::env::args().collect();
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let path = &args[1];
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let iter_chars = iterate_text::file::characters::IterateFileCharacters::new(path);
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/* link assembly-program to symbols
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*/
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linker.add_procedure(
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"main",
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compile(
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&main_scope,
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"main",
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"{
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let print-nullterm =
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λ{} : < Seq Char ~Ascii ~ machine.Word >
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~ < NullTerminatedArray machine.Word >
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↦ {
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while(dup) { emit; }
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drop;
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};
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print-nullterm 'H' 'a' 'l' 'l' 'o' ' ' 'W' 'e' 'l' 't' '!' '\n' '\0';
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let fmt-uint =
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λx : ℕ ~ ℤ_2^64 ~ machine.UInt64
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↦ {
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if( x ) {
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while( x ) {
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i+ '0' (i% x 10);
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! x (i/ x 10);
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}
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} else {
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'0';
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};
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};
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let print-uint = λx:ℕ ↦ print-nullterm (fmt-uint x) '\0';
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let int-neg = λx : ℤ ~ machine.Int64 ~ machine.Word ↦ i+ (bit-neg x) 1;
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let int-sign = λx : ℤ ~ machine.Int64 ~ machine.Word ↦ bit-and (bit-shr x 63) 1;
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let int-lt = λ{
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a : ℤ ~ machine.Int64;
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b : ℤ ~ machine.Int64;
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} ↦ int-sign (i- a b);
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let int-gt = λ{
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a : ℤ ~ machine.Int64;
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b : ℤ ~ machine.Int64;
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} ↦ int-sign (i- b a);
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let int-eq = λ{
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a : ℤ ~ machine.Int64;
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b : ℤ ~ machine.Int64;
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} ↦ if (i- a b) { 0; } else { 1; };
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let int-lte = λa:ℤ ↦ λb:ℤ ↦ bit-or (int-lt a b) (int-eq a b);
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let int-gte = λa:ℤ ↦ λb:ℤ ↦ bit-or (int-gt a b) (int-eq a b);
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let int-min = λ{
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a : ℤ ~ machine.Int64;
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b : ℤ ~ machine.Int64;
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} ↦ if( int-lt a b ) { a; } else { b; };
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let int-max = λ{
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a : ℤ ~ machine.Int64;
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b : ℤ ~ machine.Int64;
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} ↦ if( int-gt a b ) { a; } else { b; };
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let vec3i-add = λ{
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{ ax:ℤ_2^64; ay:ℤ_2^64; az:ℤ_2^64; } : <Vec3 ℤ_2^64~machine.UInt64>;
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{ bx:ℤ_2^64; by:ℤ_2^64; bz:ℤ_2^64; } : <Vec3 ℤ_2^64~machine.UInt64>;
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} ↦ {
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i+ az bz;
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i+ ay by;
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i+ ax bx;
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};
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let fmt-vec3i =
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λ{ x:ℤ_2^64; y:ℤ_2^64; z:ℤ_2^64; } : <Vec3 ℤ_2^64~machine.UInt64>
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↦ {
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'}';
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fmt-uint z; '='; 'z'; ' '; ';';
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fmt-uint y; '='; 'y'; ' '; ';';
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fmt-uint x; '='; 'x'; '{';
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};
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let red-u8rgb
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: <Fn <> Color ~ RGB ~ <Vec3 ℝ_0,1 ~ ℤ_256 ~ machine.UInt64>>
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= λ{} ↦ { 0; 0; 255; };
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let green-u8rgb = λ{} ↦ { 0; 255; 0; };
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let blue-u8rgb = λ{} ↦ { 255; 0; 0; };
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let yellow-u8rgb = λ{} ↦ { 0; 220; 220; };
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print-nullterm (fmt-vec3i (vec3i-add green-u8rgb blue-u8rgb)) '\n' '\0';
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}"
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),
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);
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linker.add_procedure("main", compile(&main_scope, "main", iter_chars));
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/* load & run compiled bytecode
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*/
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let main_addr = linker
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.get_link_addr(&"main".into())
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.expect("'main' not linked");
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