improve main example
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parent
2b7d974851
commit
312e97193a
2 changed files with 55 additions and 31 deletions
76
src/main.rs
76
src/main.rs
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@ -33,6 +33,17 @@ fn compile(
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.into_asm(&name.into())
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}
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/* TODO:
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* - Parse Comments
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* - write to address resulting from expression
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* - `::` -> '.' and allow ↦ only
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* - Parser error reporting
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* - Compiler error reporting
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* - Typecheck for LTExpr::Application
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* - typecheck & inference for rest
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*/
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fn main() {
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// create virtual machine with 4096 words of memory
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let mut vm = tisc::VM::new(0x1000);
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@ -55,39 +66,56 @@ fn main() {
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~ < NullTerminatedArray machine::Word >
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↦ {
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while(dup) { emit; }
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emit;
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drop;
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};
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print-nullterm 'H' 'a' 'l' 'l' 'o' ' ' 'W' 'e' 'l' 't' '!' '\n' '\0';
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let print-uint =
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let fmt-uint =
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λx : ℕ ~ ℤ_2^64 ~ machine::UInt64
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↦ {
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if( x ) {
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print-nullterm {
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'\0';
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while( x ) {
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i+ '0' (i% x 10);
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! x (i/ x 10);
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}
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};
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} else {
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emit '0';
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'0';
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};
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};
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let print-uint = λx:ℕ ↦ print-nullterm (fmt-uint x) '\0';
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let int-neg = λx : ℤ~machine::Int64~machine::Word ↦ i+ (bit-neg x) 1;
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let int-sign = λx : ℤ~machine::Int64~machine::Word ↦ bit-and (bit-shr x 63) 1;
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let int-lte = λ{
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a : ℤ~machine::Int64~machine::Word;
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b : ℤ~machine::Int64~machine::Word;
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let int-lt = λ{
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a : ℤ ~ machine::Int64;
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b : ℤ ~ machine::Int64;
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} ↦ int-sign (i- a b);
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let int-gt = λ{
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a : ℤ ~ machine::Int64;
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b : ℤ ~ machine::Int64;
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} ↦ int-sign (i- b a);
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let int-eq = λ{
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a : ℤ ~ machine::Int64;
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b : ℤ ~ machine::Int64;
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} ↦ if (i- a b) { 0; } else { 1; };
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let int-lte = λa:ℤ.λb:ℤ ↦ bit-or (int-lt a b) (int-eq a b);
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let int-gte = λa:ℤ.λb:ℤ ↦ bit-or (int-gt a b) (int-eq a b);
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let int-min = λ{
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a : ℤ ~ machine::Int64;
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b : ℤ ~ machine::Int64;
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} ↦ if( int-lt a b ) { a; } else { b; };
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let int-max = λ{
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a : ℤ~machine::Int64~machine::Word;
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b : ℤ~machine::Int64~machine::Word;
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} ↦ if( int-lte b a ) { a; } else { b; };
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a : ℤ ~ machine::Int64;
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b : ℤ ~ machine::Int64;
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} ↦ if( int-gt a b ) { a; } else { b; };
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let vec3i-add = λ{
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{ ax:ℤ_2^64; ay:ℤ_2^64; az:ℤ_2^64; } : <Vec3 ℤ_2^64~machine::UInt64>;
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@ -98,27 +126,23 @@ fn main() {
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i+ ax bx;
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};
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let print-vec3i =
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let fmt-vec3i =
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λ{ x:ℤ_2^64; y:ℤ_2^64; z:ℤ_2^64; } : <Vec3 ℤ_2^64~machine::UInt64>
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↦ {
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print-nullterm '{' 'x' '=' '\0';
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print-uint x;
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print-nullterm ';' ' ' 'y' '=' '\0';
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print-uint y;
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print-nullterm ';' ' ' 'z' '=' '\0';
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print-uint z;
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print-nullterm '}' '\0';
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'}';
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fmt-uint z; '='; 'z'; ' '; ';';
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fmt-uint y; '='; 'y'; ' '; ';';
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fmt-uint x; '='; 'x'; '{';
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};
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let red-u8
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let red-u8rgb
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: <Fn <> Color ~ RGB ~ <Vec3 ℝ_0,1 ~ ℤ_256 ~ machine::UInt64>>
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= λ{} ↦ { 0; 0; 255; };
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let green-u8 = λ{} ↦ { 0; 255; 0; };
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let blue-u8 = λ{} ↦ { 255; 0; 0; };
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let yellow-u8 = λ{} ↦ { 0; 220; 220; };
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let green-u8rgb = λ{} ↦ { 0; 255; 0; };
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let blue-u8rgb = λ{} ↦ { 255; 0; 0; };
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let yellow-u8rgb = λ{} ↦ { 0; 220; 220; };
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print-vec3i (vec3i-add green-u8 blue-u8);
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emit '\n';
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print-nullterm (fmt-vec3i (vec3i-add green-u8rgb blue-u8rgb)) '\n' '\0';
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}"
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),
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);
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@ -42,7 +42,7 @@ pub fn init_runtime(linker: &mut Linker) -> Arc<RwLock<Scope>> {
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);
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linker.add_procedure("dup", tisc::Assembler::new().inst(tisc::VM_Instruction::Dup).build());
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linker.add_procedure("drop", tisc::Assembler::new().inst(tisc::VM_Instruction::Accept).build());
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linker.add_procedure("drop", tisc::Assembler::new().inst(tisc::VM_Instruction::Drop).build());
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linker.add_procedure("emit", tisc::Assembler::new().inst(tisc::VM_Instruction::Emit).build());
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linker.add_procedure("accept", tisc::Assembler::new().inst(tisc::VM_Instruction::Accept).build());
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